How to Design PCBs to Maximize the Yield Rate

For many centuries, it has been known, or at least assumed, that the amount of energy in a closed system is constant. This assumption was finally adjudicated by the Law of Conservation of Energy, and although there has been no shortage of attempts at disproval, it has continued to hold firmly. This can be viewed pessimistically as a restraint preventing the design of a system that produces more energy than its source. However, it can also be viewed optimistically as a goal for perfection that is obtainable regardless of its elusiveness.

When designing your PCB layout, the optimist in you may believe that your boards will be manufacturable at a 100% first pass yield rate. Although this is obtainable for some simple designs, it is more likely that one or more faults will lower the yield, thereby causing some of the boards to require additional design/build/testing iterations or be damaged beyond usability or repair. However, before sinking into pessimism, it’s helpful to note that with a good understanding of the faults that can lower the yield, we can design PCBs that have a better chance of approaching that elusive 100% usable rate.

What Impacts the Yield Rate?

In PCB manufacturing, the yield rate is the number of usable PCBs per panel. This rate is usually applied to production runs and a low rate increases manufacturing costs. As cost is a primary concern during production manufacturing, one objective of the PCB prototype iterative process is to eliminate or reduce all design faults that can negatively impact the yield rate. Design faults may be caused by the following:

• Component errors

Component footprint mismatch

• PCB layout errors

Trace clearance violation

Pad clearance violation

Board edge clearance violation

Drill hole clearance violation

Missing solder mask

Trace copper imbalance

• Stackup errors

Incorrect material selection

Inadequate or missing flex support

• Thermal design errors

Inadequate thermal reliefs

Most of the faults above will probably not be detected during fabrication; in fact, some may not be discovered during or even after your boards have been assembled. In either case, you lose valuable development time to make design revisions and incur additional manufacturing costs to have new boards made.

How to Design PCBs to Maximize the Yield Rate

Although the yield rate is a quantitive measure of success for the production-level manufacture of your boards, most faults can be detected and solved during prototyping. In fact, manufacturing optimization during the PCB prototype iteration process is a good indicator of the yield rate for production. Therefore, the first step in designing your PCBs for the best yield rate is ensuring that a maximal number of boards are usable during prototype manufacturing. This is best achieved by the following:

• Ensure BOM is accurate

The components of your BOM must match your layout footprints. Simple errors here may be fixed with simple component replacement; however, in other cases, this may result in faults like inaccurate drill hole location and/or size that will render the board unusable.

• Choose materials based upon your board type

The material selections for your board construction impact the electrical and mechanical strength of your PCB. Bad decisions here may result in failure due to thermal or physical stress.

• Use good spacing and follow clearance guidelines

Inadequate spacing and clearances, especially between solder joints can lead to solder bridging that can damage components.

• Use adequate support for flex boards

Stiffeners or fixtures should be utilized to ensure your flex boards meet structural requirements for PCB assembly.

In addition to the design guidelines above, you should also design for simplicity. Complex designs place inordinate pressure on manufacturing by straining equipment capabilities and may result in faults. It may also a good idea to utilize circuit board testing. Although testing at the prototype stage increases turnaround time and costs, it is much better to discover potential faults at this point than to waste many more boards during a high-volume productions run.