Potential max capacitance violations
To achieve an optimal design and PCBA build, system boundaries must be clearly defined and testable. For electrical circuits, minimum and maximum parameters such as voltage, current and power must be predicted during design and realized through operation. This can be difficult to accomplish, as changing resistances, inductances and especially capacitances can affect these parameters.
For example, stray capacitance effects existing between conductors on both PCBs—fabricated bare boards—and PCBAs—assembled boards containing components—can influence electrical parameters such as current flow. Ensuring that capacitance values are limited is imperative to your board’s operation. However, if your design includes max capacitance violations, there are steps that you and your CM can take to alleviate them.
What are Max Capacitance Violations?
For each output pin, there is a maximum capacitance that can be driven from that output. There is also a corresponding minimum capacitance. Many PCBAs today include components such as processors and VLSI devices with outputs that are distributed to multiple loads. This signal distribution is known as fanout. Due to the capacitance limitation for each output pin, there is a maximum number of outputs that can be driven from that source. If the fanout limit is exceeded, the device’s signal transfer will suffer.
As capacitance is determined by the circuit to which the output is connected, the capacitance limit can be exceeded by an inappropriate fanout. Capacitors typically operate as temporary storage devices; therefore, the transition time or propagation delay between the source and the outputs can be affected. Depending upon the type of circuit or board, this can be a significant problem. However, appropriate actions during design and manufacturing can eradicate this issue.
A Collaborative Approach to Fix Max Capacitance Violations?
Max capacitance violations fall under the broad category of PCBA design rules. These rules enumerate the constraints that will allow your design to meet its functionality objectives and be manufacturable. Properly instituting these rules requires collaboration with your CM, as there are both design and manufacturing protocols.
The best designs will satisfy or clear all design rule check (DRC) violations that are typical for initial designs of any degree of complexity. Clearing DRC violations—including max capacitance violations—will require design modifications. For example, if excessive fanout is the issue, then the number of outputs can be reduced or buffers can be used on some output lines. If available, circuit simulation software is recommended to enable multiple scenario testing. Additionally, your selected design parameters should fall within your CM’s DFM guidelines.
Once your design is transferred to your CM, a DFM check should be performed to ensure that your design selections fall within the range of the CM’s equipment and processes. It is possible that while your board is manufacturable, violations such as max capacitance still exist on the board. Design issues can be corrected with slight changes to your layout, such as increased trace clearances. By working with your CM, minor adjustments may be incorporated without the normal back-and-forth between the designer and manufacturer.
|Tempo's Custom PCB Manufacturing Service
While design issues like max capacitance violations can be easily fixed, they pose significant problems if left uncorrected. At Tempo Automation, we specialize in fast, accurate PCBA manufacturing to aid you in achieving a production level design with the least number of Design-Build-Test cycles.
And to help you get started on the best path, we furnish information for your DFM checks and enable you to easily view and download DRC files. If you’re an Altium Designer or Cadence Allegro user, you can simply add these files to your PCB design software. For Mentor Pads or other design packages, we furnish DRC information in other CAD formats and Excel.